Abstract
Due to their large storage capacity and small access time static random access memory (SRAM) has become a vital part in numerous VLSI chips. Low power adequate memory configuration is a standout among the most challenging issues in SRAM design. As the technology node scaling down, leakage power utilization has turned into a noteworthy issue. In this paper a novel power gating technique, namely sleepy keeper leakage control transistor technique (SK-LCT) is proposed for a handheld gadget application. The SRAM architecture has two primary components, specifically SRAM cell and sense amplifier. The proposed SK-LCT technique is applied in both SRAM cell and sense amplifier for a new low power high speed SRAM architecture design. The outline of SRAM architecture utilizing pass transistor decoder (PT-Decoder) gives better outcomes in term of power. Simulation is done using Tanner EDA tool in 180nm technology and the results demonstrate a noteworthy change in leakage power utilization and speed.
Highlights
Very Large Scale Integration (VLSI) is the way towards incorporating a million of transistors inside a single microchip
The simulation result indicates the examination of various parameters like power consumption, leakage power and delay
static random access memory (SRAM) cell design using the novel sleepy keeper leakage control transistor technique (SK-LCT) technique saves 57.53% of power and 44.70% of delay
Summary
Very Large Scale Integration (VLSI) is the way towards incorporating a million of transistors inside a single microchip. Quick advancement in the VLSI design process brings about the expansion of densities of the integrated circuit [1]. With the progression of innovation that are occurring in the universe, the demand for large storage of data is increasing in a way that needs to be faster than the current advancement [2]. Increment of power dissipation has ended up the major impediment against the further advancement of VLSI circuits. Power utilization because of the memory gets to frequently constitute a prevailing part of the aggregate power utilization [3].
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