Processor assignment in heterogeneous parallel architectures

Abstract

It has been already demonstrated that cost-effective multiprocessor designs may be obtained by combining in the same architecture processors of different speeds (heterogeneous architecture) so that the serial and critical portions of the application may benefit from a fast single processor. The paper presents a systematic way to build static heuristic scheduling algorithms for such environments. Several algorithms are proposed and their performances are compared through simulation. One of the proposed algorithms is shown to achieve substantial performance gains as the degree of heterogeneity of the architecture increases. >