Processing effects on the electrical properties of defects in silicon

Abstract

Minority carrier lifetime and Hall effect measurements, as well as capacitance transient spectroscopy, have been used to characterize the defects induced by thermal and stress treatments in float zone n-type silicon. The minority carrier lifetime was analysed with respect to the processing conditions by charge collection scanning electron microscopy. Parameters related to the role of the introduced defects were evaluated from the lifetime values by a fitting procedure based on the Shockley-Read-Hall theory; namely, the energy level, capture cross-section, trap density and dislocation occupation factor were obtained. The same parameters were also deduced from deep level transient spectroscopy (DLTS) and Hall effect measurements. In comparing the results, it was taken into account that by the lifetime analysis only the energy level related to the most efficient minority carrier capture centre could be found, while from DLTS and Hall effect measurements several deep levels were detected. A hypothesis is advanced on the nature of the defects and significant differences, according to the specimen history, are pointed out.