Process integration for low-cost system on a package (SOP) substrate

Abstract

The Packaging Research Center is working on novel System-on-a-Package (SOP) technology for next generation mixed-signal systems packaging. At the heart of the new SOP strategy is a fully integrated substrate with ultra-high density wiring and integrated passive and optoelectronic components. The two major goals of this substrate technology are highest level of integration incorporating added functionality to the substrate; and lowest cost. SOP integration research involves a number of unique testbeds that bring together the entire gamut of PRC research innovations into technology demonstration platforms. A global team of faculty, students, researchers and industry engineers at the PRC is developing these testbeds. The challenges in this integration process and the outcome from the test vehicles are utilized to generate new roadmaps and research projects to address these technical barriers. The PRC's latest SOP-3A substrate is a six metal layer structure using sequential build up processing on a high T/sub g/ FR-4 or FR-5 laminate that includes embedded resistors, capacitors and inductors. Included in the six metal layers are four layers of high density wiring metallization and four micro via levels, and plated through hole (PTH) interconnects. SOP-3A testbed is the latest in the line of PRC mixed-signal integrated modules incorporating novel PRC research innovations into a large area 300 mm /spl times/300 mm, low-cost platform. The SOP-3A substrate consists of five test areas exploring various issues for SOP technology. This paper will present the electrical design of the SOP-3A test vehicle, followed by the materials and processes used for building the integrated substrate. High density wiring and microvia results will be discussed. Electrical test results from the test vehicle characterization, including high speed digital, RF/wireless, and optoelectronics applications will be discussed. Challenges for mixed-signal substrates including integration issues will be discussed. Future SOP test vehicles will include eight metal layers, where six of these layers will be high density interconnect metallization and six micro via levels, and incorporate high value R, L, C, and embedded diffractive optical elements.