Process development and bonding quality investigations of silicon layer stacking based on copper wafer bonding

Abstract

Process development of silicon layer stacking based on copper wafer bonding, grind-back, and etch-back was applied to demonstrate a strong four-layer-stack structure. Bonded copper layers in this structure became homogeneous layers and did not show original bonding interfaces. This process can be used in three-dimensional integrated circuit applications. Voids and total bonded area after each layer stacking were investigated for the bonding quality after each layer stacking. Large wafer bows from high residual stresses result in the structure failure at the stacking of a high number of layers.