Process design and emission properties of gated n+ polycrystalline silicon field emitter arrays for flat-panel display applications

Abstract

The gated n+ polycrystalline silicon (poly-Si) field emitter arrays (FEAs) have been designed and successfully fabricated on an oxidized silicon wafer for large display applications. The proposed structure of the FEAs eliminates the difficulty of having the cathode electrode (n+ diffusion layer)-to-cathode electrode isolation, which is common to crystalline silicon (c-Si) field emitter arrays. Compared with c-Si field emitters, poly-Si emitters showed poor uniformity in device structure such as emitter shape and gate hole, which was thought to be due to the variation of the grain size of poly-Si and the oxide thickness associated with grain boundaries of poly-Si in the sharpening oxidation step. The anode current of 0.1 μA/tip was measured at the gate bias of 82 V from poly-Si emitters with gate hole diameter of 1.2 μm under the vacuum pressure of 3×10−9 Torr. The same anode current was obtained at 80 V from c-Si emitters with the gate hole diameter of 1.6 μm. The gate leakage current for both the c-Si FEA and the poly-Si FEA was much less than 1% of the anode current. Long-term fluctuation characteristics in emission current of the poly-Si FEA are also studied under different sample treatments. In spite of much room for improvement, the emission characteristics of poly-Si FEAs are outstanding in terms of emission current and gate leakage current, compared with those of previously reported poly-Si FEAs.