Process Dependent Optimization of Dielectric and Metal Stacks for Multilevel Resistive Random-Access Memory

Abstract

Recently, multilevel Resistive RAM (ReRAM) stacks have been demonstrated to have promising applications related to inference and learning in artificial intelligence. However, extensive studies on energy efficiency, repeatability, and retention during multilevel operations have not been undertaken previously. It is, therefore, required to investigate the device characteristics such as compliance current (CC) dependence, forming voltage, memory window, symmetry, and switching energy. Furthermore, understanding the impact of dielectric composition and/or electrode materials is necessary to optimize the device performance, such as switching characteristics, endurance, and energy efficiency. In this work, we have investigated a two-terminal ReRAM device, 10nm Ti/50nm TiN/7nm HfO2/1nm Al2O3/PVD Ti/TiN (Fig. 1), with bilayer switching dielectrics of HfO2 and Al2O3. In this case, the embedded Al2O3 layer was placed between the HfO2 layer and the top electrode (TE). We have evaluated the gradual resistance change capability with varying CC.The I-V characteristics of the ReRAM device, measured by a dc double sweep, is shown in Fig. 2. The device switched at a compliance current of 50nA with a forming voltage of 1.85 volts to set to low resistance state (LRS) from the high resistance state (HRS). The subsequent reset from LRS to HRS was obtained during the negative voltage ramp showing a bipolar switching operation (Fig. 2). With the variation of compliance current (50 nA to 70 nA), the LRS was gradually changed indicating multilevel LRS. It is known that by increasing the compliance current with a gradual set process, multiple conducting filaments (CFs) or thicker CFs can form setting the different LRS values and the annihilation of the CFs during the reset process can also moderately vary the HRS values. The resistance ratio between the HRS and LRS was observed to be more than 1000. The devices were subjected to 100 cycles of SET and RESET operations at different CCs without any failures. When the embedded Al2O3 layer was placed between the bottom electrode (BE) and the HfO2 layer, the switching compliance current was increased to 10 mA with a reduced forming voltage of 1.6V. Multilevel LRS states were observed for this device when the CC was varied from 10 mA to 12 mA for 100 cycles at each CCs.To further understand the behavior, TEM depth profile measurements were carried out, and it was observed that Al2O3 diffused from the peak at the as-deposited location into the HfO2 layer in both cases. While this improved the uniformity in switching behavior, the low switching energy consumption in the case of an embedded Al2O3 layer in between the HfO2 layer and the TE layer remains to be investigated. Replacing the PVD Ti layer (Fig. 1) with ALD Ti in the TE when an Al2O3 layer was between the bottom electrode (BE) and the HfO2 layer reduced the switching compliance current from 10 mA to 100 nA. This suggests that the metal quality of the TE can impact the switching behavior of the multilevel ReRAMs. Figure 1