Abstract

The focus of the RAPIDO workshop is on methods and tools for rapid simulation and performance evaluation in embedded and high performance system design. Given continuous advances in chip technology, it is to be expected that future-generation processors will integrate numerous units on a single die, including multiple (heterogeneous) processor cores, multiple levels of (shared/private) caches or memories, and dedicated accelerators, which will be glued together through a network on-chip (NoC). The design space is huge though and several design metrics should be considered as well for selecting the optimal system configuration. Despite several years of research, the early stage design phase still requires to be supported by innovative design methodologies and tools for simulation, exploration and performance evaluation. RAPIDO seeks for original research papers that face this challenge for embedded and high performance computing systems.

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