Abstract
On behalf of the organizing committee, we would like to welcome you to the 10th International Workshop on System-Level Interconnect Prediction (SLIP'08), held on April 5-6, 2008 at Newcastle University in Newcastle upon Tyne, United Kingdom. The SLIP workshop focuses on modeling and prediction of usable properties of optimized interconnect systems and their impact on system performance. Both theory and applications of interconnect prediction techniques are highlighted, with emphasis on applications to architectural and micro-architectural exploration, physical design, interconnect technology planning, and communication networks. In addition to the presentation of state-of-the-art papers in these fields, invited talks and tutorials by leading researchers aim to encourage dialogue between the architecture, physical design, and interconnect technology communities. Following a rigorous review process, the program committee has selected 9 contributed papers for publication in the proceedings and oral presentations at the workshop. The topics of selected papers cover a broad range of topics, including FPGA interconnect modeling and architectures, modeling and design of high-performance communication links, global and timing-driven routing, network-on-chip traffic characterization, and impact of process variation on interconnect reliability. In addition to the contributed papers, we continue the SLIP tradition of featuring in the technical program several distinguished invited speakers. This year Arkadiy Morgenshtein from Technion will speak on delay modeling and minimization in logic paths with interconnects, Gerald Smit from the University of Twente will speak on multi-core architectures, and Simon Moore from the University of Cambridge will speak on communication vs. computational complexity.
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