Probing negative bias temperature instability using a continuum numerical framework: Physics to real world operation

Abstract

CMOS reliability is facing unprecedented challenges due to the continued scaling of device dimensions. To sustain the current scaling trends, it is imperative to understand the fundamental physics of failure mechanisms. Due to the inherent complexity of these mechanisms, some of the key failure mechanisms can be understood only by a numerical modeling approach. Most failure mechanisms have a characteristic time dependence to failure. Hence in this work, we use a numerical approach to investigate the time dependence of failure mechanism associated with interfacial kinetics at the Si/SiO 2 interface. Several models are critically examined to develop a reaction/diffusion based modeling framework for predicting interface state generation. Our modeling shows reactions at the Si/SiO 2 interface have a direct impact on the time dependence (or time slopes). These time kinetics predictions shed light on the underlying mechanisms behind an technologically important failure mechanism (negative bias temperature instability (NBTI)). In particular, the breaking of an interface SiH bond to release atomic H results in a time slope of 0.25, whereas the release of molecular H 2 results in a time slope of 0.165. Based on this model, we conclude NBTI degradation is dominated by diffusion of neutral molecular hydrogen defects. These models are extended to 2D simulations to study device layout effects. Our simulations suggest differences with device structure (Lgate, Width etc.) and agree with observed experimental results. The developed models are further applied to understand operation under dynamic and static stress.