Probing Charge Transport Difference in Parallel and Vertical Layered Electronics with Thin Graphite Source/Drain Contacts

Jiayi Li,Meng-Hsun Hsieh,Shih-Hsien Yang,Yuan-Ming Chang,Jen-Kuei Chang,Yen-Fu Lin,Ko-Chun Lee,Che-Yi Lin

doi:10.1038/s41598-019-56576-8

Jiayi Li, Meng-Hsun Hsieh + Show 6 more

Open Access

https://doi.org/10.1038/s41598-019-56576-8

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Abstract

In the present study, we aim to help improve the design of van der Waals stacking, i.e., vertical 2D electronics, by probing charge transport differences in both parallel and vertical conducting channels of layered molybdenum disulfide (MoS2), with thin graphite acting as source and drain electrodes. To avoid systematic errors and variable contact contributions to the MoS2 channel, parallel and vertical electronics are all fabricated and measured on the same conducting material. Large differences in the on/off current ratio, mobility, and charge fluctuations, between parallel and vertical electronics are evident in electrical performance as well as in charge transport mechanisms. Further insights are drawn from a well-constrained analysis of both temperature-dependent current-voltage characteristics and low-frequency (LF) current fluctuations. This work offers significant insight into the fundamental understanding of charge transport and the development of future layered-materials-based integration technology.

Highlights

In the present work, a layered MoS2 van der Waals heterostructure with thin graphite acting as contacting electrodes was designed and fabricated by mechanical exfoliation and dry-transfer methods
We emphasize that the use of thin graphite as contacting electrodes reduces the impact of contact resistance on electronics and further exposes the electrical contribution of interlayer resistance between adjacent MoS2 layers in the vertical conducting channel
In the process of device fabrication, thin graphite 1 (Gr1) was first mechanically exfoliated and transferred on a heavily n-doped silicon substrate with a silicon oxide surface coating of 300 nm thickness; this surface served as the bottom electrode for the MoS2 channel

Summary

Introduction

A layered MoS2 van der Waals heterostructure with thin graphite acting as contacting electrodes was designed and fabricated by mechanical exfoliation and dry-transfer methods. The unique configuration, with two drains and one source, can conduct through both parallel and vertical channels in the same MoS2 flake. This configuration provides insight into charge transport mechanisms and shows the differences in electrical properties between the different transport directions. Through a careful analysis of temperature dependence of current-voltage (Ids − Vds) behaviors in our layered MoS2 heterostructure, electrical performance was systematically compared between parallel and vertical channels. Mobility variation with decreasing temperature displayed obvious upward and downward trends, respectively, for parallel and vertical electronics. This pattern suggests the domination of interlayer resistance in the vertical conducting channel. The experimental observations provide a basic understanding of electrical properties for layered electronics, and pave the way for using van der Waals heterostructures to develop future 3D artificial configurations

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