Abstract

The probability of error analysis is presented for single and multiple-output combinational logic systems which are constructed from gates subject to internal soft errors. A general model is described which accounts for the soft errors by allowing the output of each gate in a realisation to fail temporarily, possibly introducing an error at one or more of the outputs. In the model, an internal noise variable is defined for each gate in the realisation. The input variables are also permitted to be random, but no assumptions except statistical stationarity are imposed. General equations for the probability of error at the system's outputs are developed. In these expressions, the effects of the system realisation appear in the Walsh transforms of an extended logic function and are separated from the Walsh characteristic functions containing the statistical parameters describing the soft errors and the inputs. Computational techniques for calculating the system performance, including fast-transform algorithms are examined. Performance curves for examples involving single and multiple-output systems, and based upon realistic probability distributions, are given. The role of redundant coverings for a particular case is studied in detail.

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