Probability based timing verification

Abstract

Worst case timing analysis is the well ~nown method of making sure that the device will operate after assembly. Unfortunately it results in ca SOZ lower performance than ultimately needed. The statistical methods for design verification [i] are extremely timeconsuming especially for the systems with considerable complexity, Nevertheless they are used because design quality appeared to be one of the Key issues in computer hardware design lately. The probability based timing verification is meant actually for the same tasK, but needs significantly less computing power, It is also a method of predicting indirectly the yield of digital systems (IC-S). The pioneer in this area is, no doubt, B. Magnnagen [2] whose algoritllms are implemented in DIGSIM and DIXI-cad systems. The proDabilistic timing verification is based on the time variables of the schematics elements. These variables are distributed in some way around the mean value, commonly specified as typical on the element data sheet. From the typical and min or max values the mean square deviation can De estimated, with each transition on the signal the mean time of occurrence and the standard deviation are associated, The time characteristics of the transition (t,o) on the signal usually are computed according to the well Known formulas, using the mean delays of elements t i, i:I,2 . . . . . K and their standard devzations on the signal propagation path 0 i, i:i,2, .... ~.