Abstract
In the field of detector development for High Energy Physics, the so-called Transient Current Technique (TCT) is used to characterize the electric field profile and the charge trapping inside silicon radiation detectors where particles or photons create electron-hole pairs in the bulk of a semiconductor device, as PiN diodes. In the standard approach, the TCT signal originates from the free carriers generated close to the surface of a silicon detector, by short pulses of light or by alpha particles. This work proposes a new principle of charge injection by means of lateral PN junctions implemented in one of the detector electrodes, called the electrical TCT (el-TCT). This technique is fully compatible with CMOS technology and therefore opens new perspectives for assessment of radiation detectors performances.
Highlights
- Low Gain Avalanche Detectors (LGAD) for particle physics and synchrotron applications N
Current Technique (TCT) is used to characterize the electric field profile and the charge trapping inside silicon radiation detectors where particles or photons create electron-hole pairs in the bulk of a semiconductor device, as PiN diodes
PN junctions implemented in one of the detector electrodes, called the electrical TCT. This technique is fully compatible with CMOS technology and opens new perspectives for assessment of radiation detectors performances
Summary
A cross section of the el-TCT device structure is shown in figure 2a. and table 1 summarises the device parameters used for the TCAD simulations. In the el-TCT concept, injection of free charge carriers (electrons in our case) is done by means of n-type implants surrounded by p-type doped regions (respectively red and blue regions in figure 2). The electrons are injected into the lightly doped substrate by pulsing node B from Vbias,B to Vtrans,B (e.g. for 1 ns), while the voltage difference between nodes A and C is set to operate the PN junction in reverse bias (i.e. Vbias,A − Vbias,C < 0) creating an electric field in the bulk of the PiN structure. A biasing scheme (including the voltage waveform applied to contact B) is shown in figure 2b. This architecture and the related biasing sequence are optimized so that injection takes place at node B. The principle of operation and device optimization will be addressed
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