Principle of operation and modeling of source-gated transistors

Abstract

We have analyzed the characteristics of hydrogenated amorphous silicon source gated transistors (SGTs) by using numerical simulations and we found that the original SGT characteristics can be reproduced without introducing barrier lowering mechanisms at the Schottky contact. Output characteristics show reduced current increase when pinch-off of the source end of the channel is triggered by increasing Vds, while perfect saturation of the drain current is achieved when pinch-off at the drain occurs. According to our simulations, even in the saturation regime the current at metal-semiconductor interface does not reach the thermionic emission limit and remains diffusion limited. Gate bias dependence of the saturation current can be simply explained as a combination of increased saturation voltage and reduced output conductance, without invoking barrier lowering mechanisms. SGT contact effects were modeled by introducing a distributed diode equivalent circuit for the source contact, which reproduces very well the device characteristics and can be easily implemented in a circuit simulator.