Abstract
This paper describes research into the hardware implementation of a binary correlation matrix memory (CMM) neural network. It shows that the network can be implemented with on-board training and testing that operates at over 200 times the speed of a current mid-range workstation, and is scalable to very large problems. The paper describes the network, how it is implemented and its performance.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have