Abstract
This work evaluates the impact on ION and IOFF currents of variations in process parameters for a set of predictive FinFET technologies from 20nm to 7nm. The main contribution of the present study is to identify relevant behavioural standards with respect to the use of FinFET technology in digital designs. It is no longer enough to focus only on the threshold voltage fluctuations in the development of projects and EDA tools considering the FinFET technology. It is necessary that EDA tools and designers evaluate all electrical characteristics.
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