Precise Electro-thermal Power Loss Model of a Three-level ANPC Inverter with Hybrid Si/SiC Switches

Abstract

Hybrid Si/SiC switches constituting a parallel connection of a lower current rated SiC MOSFET and a higher current rated Si IGBT are becoming very attractive solution for designing high frequency and high-power density power electronic converters. Due to the complementary nature of Si IGBT devices (smaller inverter cost and smaller conduction loss) and SiC devices (smaller switching loss and higher junction temperature capability), these novel switch device configurations enable a good tradeoff between cost and efficiency for high power converter applications. One such recent application of hybrid Si/SiC switches for efficiency-cost optimization is an Si/SiC hybrid switch based ANPC inverter proposed in Ref. [30]. In Ref. [30] the topology structure, modulation strategy and the efficiency-cost benefits of the proposed ANPC inverter is presented. In this paper a precise electro-thermal power loss model for this ANPC inverter topology will be presented based on the modulation strategy of the inverter and the operating characteristics of the Si/SiC hybrid switches. The power loss model development takes into account how the current sharing between the two internal devices of the Si/SiC hybrid switches and their corresponding gate control method affects their power loss. A brief introduction to the topology structure and operation principle of the Si/SiC based ANPC inverter is first highlighted to provide context for readers and then a detailed description of the proposed electro-thermal power loss model is presented. The precision of the electro-thermal power loss model introduced in this paper is then validated using experimentally measured energy loss, device temperature and inverter efficiency data.