Practical Realization of ΣΔMs: From Circuits to Chips

Abstract

This chapter describes the additional or auxiliary circuits that cover the generation of clock phases, common‐mode voltage and bias currents. It deals with some of the most important design issues related to the layout, chip prototyping, and experimental verification of high‐performance ΣΔM ICs. The chapter presents an overview of the most important blocks, showing their fundamental schematics as well as some practical considerations that should be taken into account in their design. The design of the I/O pad ring enclosing the ΣΔM core layout is also very important to guarantee correct operation of the modulator. Layout computer‐aided design (CAD) tools, such as the design rule checker (DRC) and layout versus schematic, LVS tool, are very useful for designers, ensuring that their layouts are free of errors. The chapter provides some ΣΔM design examples and case studies to illustrate some practical design considerations.