Practical Considerations in the Implementation of Same‐Level Mixed Lithography

Abstract

Some practical considerations involved in the use of same‐level mixed lithography are discussed. This new process involves e‐beam exposure of the fine features of a pattern and optical exposure of the large features onto the same resist layer, followed by a single‐development step. With the use of a diazo‐type resist, either positive or negative e‐beam images can be obtained so that suitable selection of the photomask tone allows complete flexibility in the choice of polarity of the composite pattern. In the positive‐polarity mode, patterning of a 0.5 μm AZ‐2415 film typically requires an electron dose of 50 μC/cm2 and an optical dose of 80 mJ/cm2, with a 70 sec development time in a 1:3.5 mixture of . A negative‐polarity mode patterning of a 0.5 μm AZ‐2415 film typically requires an electron dose of 60 μC/cm2 and an optical dose of 300 mJ/cm2, with a 15 sec development in the same 1:3.5 mixture of . In each polarity mode, a close examination is made of the “joint” region where the e‐beam‐exposed area meets the optically exposed area. Patterning of an MOS device using this same‐level mixed lithography process in the negative polarity mode is described. Gate lengths as small as 0.6 μm have been defined and anisotropically plasma etched into doped polysilicon. This new technique combines high resolution with high throughput on the same level while maintaining a simple process with only one coating, one development, and one transfer step.