PR-LRU: partial random LRU technique for performance improvement of last level cache

Abstract

As chip multiprocessors (CMP) have become eminent in all areas of computing, it is inevitable for the operating system to schedule processes efficiently on different cores. These multi-cores pose different challenges of which shared resource contention is the dominant one, as cores share resources like last level cache (LLC) and main memory. This can lead to poor and unpredictable performance of the threads running on the system. The cache replacement policy of LLC becomes critical in managing the cache data in an efficient way. Though prominent, least recently used (LRU) algorithm has some issues with applications which do not follow the temporal locality pattern. This study proposes a modification to the LRU algorithm where a random selection of the victim from 'N' LRU blocks yields better results than the conventional method. The evaluation of the algorithm is carried out using Multi2sim simulator using Parsec and Splash2 benchmarks. The results show an overall performance improvement in hit ratio up to 6% and 2% over LRU for PARSEC and SPLASH2 benchmarks respectively.