Abstract

Neuromorphic computing (NC) has acquired tremendous interest because of its ability to overcome the limitations of von-Neumann systems in data-intensive applications. NC systems are inspired from the human brain, which combine storage (synapse) and compute (neuron) to circumvent the memory bottlenecks in von-Neumann computing. The human brain consists of densely connected neurons, where each neuron can connect to thousands of synapses. Such dense connectivity enables hierarchical learning that enables high classification accuracies in NC systems, such as spiking neural networks (SNNs). Past research has focused on many-core architectures that implement synapses with memristive crossbars to overcome the memory bottlenecks and enable efficient compute. However, mimicking brainlike connectivity poses significant challenges. This is because the typical computation cores in a many-core architecture are connected with network-on-chip (NOC), which have high power consumption. In this paper, we propose a power line communication (PLC)-based architecture built with memristive crossbars for SNNs. PLC can use the on-chip power lines augmented with low-overhead transceiver to communicate data between neurons efficiently. Hence, PLC can enable dense connectivity required in SNNs while preserving the efficiency of memristive crossbars. We perform evaluations on SNNs ranging in scale from 1to 10 M synapses to demonstrate the efficiency of PLC-based NC system. We also propose a hybrid PLC–NOC-based design which can achieve high throughput along with high energy efficiency.

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