Power-hardware-in-the-loop simulator for brushless DC motor

Abstract

Although brushless DC motor (BLDCM) is widely used, testing its drives is troublesome. To deal with the problem, the power hardware-in-the-loop (PHIL) simulator is necessary to replace the real BLDCM, which can exchange not only signals but also electric power with the drive. However, few literatures discussed the PHIL simulator for BLDCM applications. Design method for the BLDCM PHIL simulator is proposed in this paper. The line voltage based BLDCM transient model is established, which can improve the fidelity during commutation and predict the floating phase voltage. The derivation of BLDCM numerical model is based on the bilinear transform and inverse Z-transform, which can achieve higher accuracy and cost low computational effort. Moreover, without power bus connection between the drive and PHIL simulator, the overall structure of PHIL simulator is constructed based on line voltage and only one digital signal processor (DSP). In addition, the analog frond end (AFE) for measuring the high speed PWM line voltage from the drive and the linear mode power stage are also designed. The effectiveness of the proposed method is validated by experimental results.