Power-Efficient O-Band 40 Gbit/s PAM4 Transmitter Based on Dual-Drive Cascaded Carrier-Depletion and Carrier-Injection Silicon Mach-Zehnder Modulator With Binary Driving Electronics at CMOS Voltages

Abstract

We present an O-band four-level pulse amplitude modulation (PAM4) transmitter based on a dual-drive silicon modulator with binary driving electronics at CMOS voltages, effectively eliminating the need for power-hungry digital-to-analog converters (DACs) and RF drivers. The fabricated dual-drive silicon modulator has cascaded p - n junction and p - i - n junction embedded in each arm of Mach-Zehnder interferometer, implementing high-speed data modulation and efficient bias control, respectively. Power dissipation of around 611 fJ/bit is obtained when synthesizing 46 Gb/s PAM4, showing high power efficiency. The fabricated silicon modulator exhibits a π-voltage-length product of 4.5 V·mm, and a 3-dB bandwidth of up to 27 GHz. Meanwhile, to implement a power-efficient PAM4 transceiver, the digital signal processing (DSP) at the receiver side is also discussed by balancing the performance and complexity. With a low-complexity DSP, negligible power penalty is observed after transmission over 38-km SSMF for both synthesized 20 Gb/s and 40 Gb/s PAM4. The presented PAM4 transmitter takes the advantages of both carrier-depletion and carrier-injection phase shifters for effective data modulation and bias control in PAM4 signalingand provides a power-efficient transmitter solution by eliminating the use of power-hungry DACs or RF drivers for datacenter interconnects.