Power Pre-Layout Optimization Tool (PPLOT) for Early Design Phase Power Integrity Layout Assessment

Abstract

Power delivery network (PDN) and power integrity (PI) design quality is critical to system stability and performance. PDN and PI design, analysis and review are challenging and complicated, but usually reviewed using visual eye ball checks which is time consuming, inaccurate, inconsistent and does not provide a comprehensive system level PDN assessment due to below reasons:•Power design is always the last to be reviewed which power delivery design practice and issue easily to be overlooked•The design diversity such as stackup, shape, decoupling caps characteristics due to different form factor and type makes review challenging to use only eye ball check based on rule of thumb to ensure PDN design quality without running PI simulation•Very few hardware design engineers have in-depth PDN design concept or PI simulation experience: as well as time for the complete review process manual power simulation still takes timeIn this paper, a novel approach called Power Pre-Layout Optimization Tool (PPLOT) for PDN and PI estimation provides the opportunity of optimizing PCB sizing/shaping for more integrated designs with simple, free and acceptable accuracy using simple methodologies/processes which will greatly transform the PDN design processes:•PPLOT is an windows excel spreadsheet based tool which is viable transportable with all hardware designers without requirement of special tool or license•PPLOT developed for end users who have zero PI simulation background or knowledge such as hardware or voltage regulator (VR) design engineers•PPLOT instantly indicates the estimate resistance, IR drop and the end users can base on their design criteria to know whether the estimated PCB width, length or stack-up is adequate to support the DC current/power at the early component placement stage to avoid potential PDN and PI design layout issues•PPLOT concept can be used on most computing systems such server, desktop, AIO, notebook, tablets and smartphones to ensure good PDN, PI design quality as well as system stability and performance