Power optimization of RF transceiver with cascode low noise amplifier using FinFET

Abstract

The primary engine, powered the ascent of electronics is miniaturization. Presently Transceiver uses advanced CMOS technology and further miniaturization in the CMOS transistor is leading to unavoidable power dissipation. In this paper, we propose a double gate (DG) MOSFET based 5 GHZ Transceiver with Cascode low noise amplifier. The proposed Cascode Low noise amplifier is to reduce the power, overall noise figure of front — end receiver and its geometrical parameters are to be varied to obtain optimal Noise Figure and gain, which is the major block in RF transmitter circuit. Geometrical parameters (channel length L g , Fin width W fin , Oxide thickness T ox ) are varied over a range from the nominal values and their effects on LNA parameters, Re{Z in }, Im {Z in }, gain and NF, has been studied.