Abstract
Power consumption minimization is an important design goal for digital circuits. To cope with the limitation of traditional Boolean (TB) logic and Reed-Muller (RM) logic on power optimization of logic synthesis, And-Xor-Inverter graph (AXIG) power optimization method based on dual-logic is proposed. This work presents a technology independent synthesis method that works on an And-Inverter Graph (AIG) data structure. Firstly, the AXIG is constructed to achieve the dual-logic expression based on AIG. Secondly, the AXIG is optimized by node reordering. The experimental results show that the proposed method can reduce by 22.12% on average in terms of power consumption compared with the ABC synthesis tool.
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