Power loss analysis in thermally-tuned nanophotonic switch for on-chip interconnect

Abstract

Nanophotonic is considered an emerging technology for future many-core systems due to its potentials for low-power and high-bandwidth communications. Nevertheless, challenges such as crosstalk noise and temperature variation of photonic devices significantly reduce the optical signal-to-noise ratio which leads to reliability decrease in the optical network on chips. In this paper, we propose a thermally-tuned symmetric optical switch (TTSOS) and analyze its thermal effects. Using thermal-based adjustment in this design leads to reduce power loss under temperature variation. The functionality of the switch is examined through several numerical simulations with 10Gb/s non-return-to-zero signals. The simulation results show the data transmissions at 10Gb/s with low crosstalk and power penalty less than −50 dB and 0.1 dB, at 1.1×10−31 bit error rate, respectively. TTSOS improves the reliability in the resonant wavelength shift of micro-ring resonator, as well as the performance of the optical multi-stage networks. Finally, at the system-level, we systematically study the worst case as well as the average insertion loss in Benes-based optical network-on-chip.