Abstract
Various class AB two-stage op-amps with high and approximately symmetrical slew rate and very simple architecture are introduced in this brief. A current replicating branch with scaled-down transistors in combination with adaptive loads is used to implement a push-pull output stage with maximum output current several times higher than the bias current. Postlayout simulation and measurement results are presented and verify a 400%-500% slew rate and 80%-100% GB enhancement with only 5% additional quiescent power dissipation and 20% silicon area increase.
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More From: IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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