Abstract

Various class AB two-stage op-amps with high and approximately symmetrical slew rate and very simple architecture are introduced in this brief. A current replicating branch with scaled-down transistors in combination with adaptive loads is used to implement a push-pull output stage with maximum output current several times higher than the bias current. Postlayout simulation and measurement results are presented and verify a 400%-500% slew rate and 80%-100% GB enhancement with only 5% additional quiescent power dissipation and 20% silicon area increase.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call