Abstract
Reducing the consumption of power in VLSI circuits is challenging. A low power circuit in multi-port memories for power consumption reduction in bit lines is presented here. In this circuit the power of wide gates used in memory bit lines is decreased by reducing the voltage swing of the pull-down network. Wide gates were simulated and the results showed 40% lower power consumption. Processors are another component where power dissipation is high. Various methods are used to decrease the power dissipation. A number of methods reduce bus transitions to limit the power dissipation.
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