Power Aware Design and Implementation of 8-bit Asynchronous Arithmetic and Logic Unit

Abstract

The last fifteen years have witnessed a resurgence of interest in asynchronous digital design techniques as they promise to liberate VLSI systems from clock skew problems, offer the potential for low power and high performance and encourage a modular design philosophy which makes incremental technological migration a much easier. One of the main reasons for using asynchronous design is that it offers the opportunity to exploit the data-dependent latency of many operations in order to achieve low-power, high-performance, or low area. This paper describes a novel power aware 8-bit asynchronous arithmetic and logic Unit (ALU). The designed ALU is targeted for low power. The 8-bit asynchronous arithmetic and logic unit (ALU) has been designed entirely using the tool named Balsa, which is an Advanced Asynchronous Hardware Description Language and Synthesis Tool, developed by University of Manchester, UK.