Power Analysis Attacks and Hardware Level Countermeasures for Cryptographic Devices

Abstract

This paper presents an overview of the most significant patents and research related to power analysis attacks and their hardware countermeasures and introduces an improved solution to the current flattening countermeasure. Moreover, the paper reviews the mechanisms of power analysis attacks and their relationship to the underlying CMOS technology. Specifically, differential power analysis is a statistical analysis attack that is successful in breaking the security of modern cryptographic devices such as smart cards, embedded devices and FPGA devices. New countermeasures based on capacitor decoupling, power balanced gates, current flattening at system and module level, on-chip switch box with decoupling capacitor bank, and others are analyzed and explained. The security of communication on all cryptographic devices is paramount and it is important to use the right countermeasure for accomplishing the highest level of security. Keywords: Side-channel attacks, differential power analysis attacks, countermeasures for power analysis attacks, current flattening devices