Power Amplifier Design Using Nonlinear Embedding

Abstract

This chapter describes the implementation of an embedding model in a circuit simulator. In a conventional de-embedding process a very wide design space must be explored using simultaneous multi-harmonic load-pull and source-pull simulations at the package reference planes to determine the multi-harmonic load and source impedance terminations delivering the targeted voltage and current waveforms at the current-source reference planes. These multi-harmonic load-pull and source-pull are affecting each other and must be performed self-consistently for reliable results. As a result, time-consuming simulations are required to obtain an accurate solution even when just considering the first three harmonics. The alternate design of PAs using nonlinear embedding is presented to bypass this blind search. The original approach relied on experimental measurements at low-frequencies, for example, 10 MHz, to select the desired intrinsic device load lines while accounting for memory effects. Nonlinear embedding of the RF contributions of the gate, drain charges, and parasitics was then used to obtain the RF waveforms at the package reference planes. Alternatively, the nonlinear embedding process can be performed automatically in a circuit simulator with the help of a nonlinear embedding device model. The PA designer can then, in a single simulation for each power level, predict from the desired mode of operation at the current-source reference planes the multi-harmonic waveforms required at the transistor package reference planes. The various examples presented in this chapter demonstrate how using an embedding device model can streamline and accelerate the design of high-performance PAs.