Abstract

This paper details postchemical‐mechanical planarization cleanup process development for interlayer dielectric films. The scope of the paper includes defining a base line polish process and developing a post‐CMP cleanup process using 150 mm wafers. The efficiency of the cleaning process was evaluated by the number of (≥0.2 μm) particles remaining on the wafer surface. The cleanup strategy included use of wet wafer transfer, postpolish buffing and rinse, basic chemistry, surfactants, HF, megasonics, and double‐sided scrubbers. Postpolish buffing and rinsing were performed on the polisher. The optimized megasonic process used dilute as the cleaning chemistry. To optimize the mechanical work done on the wafer surface during scrubbing, brush rotation speed, wafer rotation speed, brush height (force), and cleaning time were varied on both the scrubbers. Basic chemistry was used only in the OnTrak scrubber. Dilute and DI water were chosen for the optimized OnTrak and Dai Nippon Screen (DNS) processes, respectively. All the HF work was performed on the DNS scrubber. The overall conclusion is that the polisher plays a major role in achieving low particle levels. Postpolish buffing and high pressure DI water spindle rinse at high spindle rotation after polish are critical for particle reduction. Optimized cleaning processes using either of the double‐sided scrubbers or using the batch megasonic cleanup followed by either of the double‐sided scrubbers provided comparable particle performance. HF was effective in the removal of ionic and metallic contaminants, but further investigation is required to check possible improvement in particle performance.

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