Postbreakdown Gate-Current Low-Frequency Noise Spectrum as a Detection Tool for High- $\kappa$ and Interfacial Layer Breakdown

Abstract

We report the use of 1/f <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">α</sup> noise spectrum in the postbreakdown regime, extracted from random-telegraph-noise signals of gate current at low sense voltages, as a characterization tool to detect the layer which breaks down first in dual-layer high-κ (HK) and interfacial-SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> -layer (IL) dielectric stacks. The power law exponent (α) of the low-frequency power-spectral-density plot and the time constant of the discrete current fluctuations reveal that the HK is almost always the first layer to break down for positive gate-stress conditions in NMOS devices. From a reliability point of view, the presence of the IL layer helps to prolong the lifetime of HK gate stacks, which may suffer from time-dependent dielectric breakdown.