Post Silicon Validation for I2C (SMBUS) Peripheral

Abstract

This paper describes the importance of Post Silicon Validation in the VLSI design flow and its flow and challenges. It revolves around validating the expected functionality of devices, their compliance with the respective protocol requirements on the tape outs by using the knowledge of C programming, embedded systems, debugger tools like Lauterbach Trace 32, Corelis debugger for I2C etc before the product release in the market. With the rapid development in the semiconductor industry and growth in logic and design complexity, Post Silicon Validation's need is evident and important for new research and improvements. The AMBA compliant-Advanced Peripheral Bus I2C device can be configured, programmed for the communication between ICs in an SOC or a system. It consists of two signal lines: one for data and one for clock with a protocol for communication. This paper follows into the Post Silicon Validation of the I2C device, with a close to 100% test coverage, which can be manipulated. After a successful Post Silicon Validation phase of the device, the reliability and performance has met the required standards.