Abstract

The sneak path current (SPC) is the inevitable issue in crossbar memory array while implementing high-density storage configuration. The crosstalks are attracting much attention, and the read accuracy in the crossbar architecture is deteriorated by the SPC. In this work, the sneak path current problem is observed and investigated by the electrical experimental measurements in the crossbar array structure with the half-read scheme. The read margin of the selected cell is improved by the bilayer stacked structure, and the sneak path current is reduced ~20% in the bilayer structure. The voltage-read stress-induced read margin degradation has also been investigated, and less voltage stress degradation is showed in bilayer structure due to the intrinsic nonlinearity. The oxide-based bilayer stacked resistive random access memory (RRAM) is presented to offer immunity toward sneak path currents in high-density memory integrations when implementing the future high-density storage and in-memory computing applications.

Highlights

  • With the high demand for high-density memory storage applications, alternative memory technology has been intensively investigated for replacing conventional charge-based flash memory which suffers from charge loss and program errors with device scaling down.To break the bottle-neck of device scaling, several emerging memory technology attracts considerable attention, such as phase-change memory (PCM) [1], ferroelectric random access memory (FeRAM) [2,3], magnetic resistive random access memory (MRAM) [4], and resistive random access memory (RRAM)

  • The nonlinearity (NL) is defined sneak path current, namely "selectorless RRAM" [31,32,33]." The nonlinearity (NL) is defined as the current at full-read voltage divided by the current at 1/2 read voltage as the V/2 as the current at full-read voltage divided by the current at 1/2 read voltage as the V/2 read [34]

  • The built-in nonlinear nature can alleviate the sneak current because the onof the selected cell can be read at a “high-voltage” region, while the sharp conductance state of the selected cell can be read at a "high-voltage" region, while the sharp conductdecrease at the “low-voltage region” effectively suppresses sneak current results from the ance decrease at the "low-voltage region" effectively suppresses sneak current results from unselected cells [35]

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Summary

Introduction

To break the bottle-neck of device scaling, several emerging memory technology attracts considerable attention, such as phase-change memory (PCM) [1], ferroelectric random access memory (FeRAM) [2,3], magnetic resistive random access memory (MRAM) [4], and resistive random access memory (RRAM). The resistive random access memory (RRAM) device holds great potential as an emerging candidate because of its simple design, high-speed operation, excellent scalability, and low power consumption [5,6,7,8]. A resistive random access memory cell, namely memristor, is a nonlinear, passive twoterminal resistance component associated with the combination of charge and magnetic flux, proposed by Leon Chua in 1971 and has been deepened into practical applications by HP Labs [9]. Among the metal oxide insulators, hafnium oxide (HfOx ) was proposed as the most promising material system based on the updated International Technology

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