Possibility of Hybrid Multilayered Perceptron Neural Network Realisation on FPGA and Its Challenges

Abstract

This paper reviewed the artificial neural network (ANN), a type of ANN called Hybrid Multilayered Perceptron (HMLP) and existing implementation of ANN on FPGA hardware. The structure of ANN and HMLP is discussed thoroughly. Past works involving HMLP had been reviewed and the HMLP had shown promising improvement over classic MLP. FPGA had seen increasing use for implementing various ANN, however ANN implementations on FPGA had encountered many challenges as discussed in this paper. After the review, it was found that, currently, no implementation of HMLP on FPGA was ever reported. Therefore a novel approach to implement the HMLP directly on FPGA is proposed at the end of the paper. The performance of the proposed FPGA-HMLP is expected to be better due to the characteristic similarity of ANN and FPGA.