Abstract
Porous insulators are utilized in the wiring structure of microelectronic devices as a means of reducing, through low dielectric permittivity, power consumption and signal delay in integrated circuits. They are typically based on low density modifications of amorphous SiO2 known as SiCOH or carbon-doped oxides, in which free volume is created through the removal of labile organic phases. Porous dielectrics pose a number of technological challenges related to chemical and mechanical stability, particularly in regard to semiconductor processing methods. This review discusses porous dielectric film preparation techniques, key issues encountered, and mitigation strategies.
Highlights
The characteristic trend of the semiconductor industry over the last several decades has been the continual miniaturization of microelectronic devices
Fluorinated silica glass (FSG) will be briefly discussed since it involves a modification of the silica network structure—removal of bridging oxygens—that is important in carbon-doped low-K and ultra low-K (ULK) films
K = 3–3.3 using the cyclic compound octamethylcyclotetrasiloxane (OMCTS, C8H24O4Si4) and oxygen. They reported that the lowering of the dielectric constant was accompanied by a decrease in network Si-O bonds as detected by the FTIR peak near the 1062 cm-1 wavenumber and an increase in suboxide/chain Si-O bonds related to the FTIR peak near the 1023 cm-1 wavenumber
Summary
The characteristic trend of the semiconductor industry over the last several decades has been the continual miniaturization of microelectronic devices. The situation was more complicated for non-scaled products, in which e.g., microprocessor size did not shrink due to added functionality Such very large scale integration (VLSI) created the possibility of significant wire RC delays, which could be mitigated by adding wiring with large cross-sectional areas and correspondingly low resistance [2]. Continual modification of SiCOH films to achieve high levels of porosity for capacitance reduction is recognized as posing inherent mechanical challenges for microelectronic devices. Potential solutions to this dilemma are discussed in the Concluding Remarks, Section 6
Sign-in/Register to view highlights & summary Sign-in/Register to access full text options 
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
