Abstract

AbstractPorous anodic alumina (PAA) thin films (thickness ∼ 50nm) were fabricated on Si by anodization of thin Al films under constant voltage of 20 V in sulphuric acid aqueous solution. The films exhibit cylindrical vertical pores of diameter ∼ 13–15 nm, arranged in hexagonal close packed structure. Electrochemical oxidation of the Si substrate through PAA, used as masking layer with openings in the pores, resulted in the formation of SiO2 dots at each pore tip. Two different kinds of films, namely with or without SiO2 dots at pore tips, were fabricated. In order to characterize the electrical quality of the interface of PAA thin films with Si, C‐V and G‐V measurements were performed on Metal‐Insulator‐Semiconductor (MIS) structures with Al metallization. The measurements were carried out in the voltage range +1.0 V to –3.0 V in steps of 0.05 V and in the frequency range 1 MHz to 100 Hz. The typical form of C‐V and G‐V curves of a MIS structure was obtained. In order to determine the interface trap density Dit, C‐f and G‐f measurements were performed as a function of the applied gate voltage in the depletion region. Dit was evaluated following the Conductance Method (E. H. Nicollian, and J. R. Brews, MOS Physics and Technology (J. Wiley & Sons, New York, 1982), p. 222 [1]). Both types of samples exhibit values of Dit in the order of 1011 eV–1cm–2. (© 2008 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

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