Abstract
We report on the fabrication and morphology/structural characterization of a porous anodic alumina (PAA)/PtSi nano-template for use as matrix in template-assisted Si nanowire growth on a Si substrate. The PtSi layer was formed by electroless deposition from an aqueous solution containing the metal salt and HF, while the PAA membrane by anodizing an Al film deposited on the PtSi layer. The morphology and structure of the PtSi layer and of the alumina membrane on top were studied by Scanning and High Resolution Transmission Electron Microscopies (SEM, HRTEM). Cross sectional HRTEM images combined with electron diffraction (ED) were used to characterize the different interfaces between Si, PtSi and porous anodic alumina.
Highlights
Semiconductor nanowires (NWs) constitute a fundamental building block for the development of nanoscale devices such as nanowire field effect transistors (FETs), energy harvesting devices, third generation solar cells, sensors and photonic devices
We first investigated the conditions of formation of a PtSi film on Si through galvanic deposition and we studied the formation of a porous anodic alumina thin film on top of the thin PtSi layer
A) Galvanic deposition of PtSi on Si The galvanic deposition of a noble metal on Si from a solution containing the metal salt was investigated in detail recently [20]
Summary
Semiconductor nanowires (NWs) constitute a fundamental building block for the development of nanoscale devices such as nanowire field effect transistors (FETs), energy harvesting devices, third generation solar cells, sensors and photonic devices. Si NWs are investigated and a lot of interesting devices based on them have been already demonstrated [1,2,3,4,5,6,7,8]. Compound semiconductor NWs are intensively investigated for their applications in light emitting devices and lasers [9,10,11]. One of the most commonly used NW synthesis techniques for both Si and compound semiconductor nanowires is chemical vapor deposition (CVD) using a noble metal as catalyst. The growth follows in general the vapor-liquid-solid (VLS) process. The growth of crystalline Si nanowires using PtSi as a microelectronics-friendly solid phase catalyst has been demonstrated
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