Polynomial metamodel based fast optimization of nano-CMOS oscillator circuits

Abstract

Modern consumer electronics are designed as analog/mixed-signal systems-on-chip (AMS-SoCs). In an AMS-SoC, the analog and mixed-signal portions have not received systematic attention due to their complex nature and the fact that their optimization and simulation consume significant portions of the design cycle time. This paper presents a new approach to reduce the design cycle time by combining accurate polynomial metamodels and optimization algorithms. The approach relies on a mathematical representation (metamodel or surrogate model) of AMS-SoC subsystems/components. Polynomial metamodels are created from post-layout parasitic netlists and provide an accurate representation for each figure-of-merit over the entire design space of the AMS-SoC component. The metamodel approach saves a very significant amount of time during design iterations. Polynomial metamodels are reusable and language independent. Three algorithms are investigated to compare the speed for optimization on the polynomial metamodels. Two widely used circuits have been designed in two different technologies as comparative case studies: an 180 nm LC-VCO and a 45 nm ring oscillator (RO). Experimental results prove that the metamodel-based optimization achieved speed-up as high as 21,600 $$\times$$ × for the LC-VCO circuit and 11,750 $$\times$$ × for the RO in comparison to the actual circuit netlist-based (SPICE) optimization, with less than 1 % error. Thus, the paper demonstrates that the polynomial metamodeling approach to the design problem is an effective and accurate means for fast design space exploration and optimization.