Polymer Filling of Silicon Trenches for 3-D Through Silicon vias Applications

Abstract

Ring-shaped silicon trenches with a depth of 50 were filled with different spin-on dielectric (SOD) polymers. Ultimately, the polymer should serve as deep trench isolation layers, also called liners, for 3-D wafer-level packaging through silicon vias (TSVs). TSVs allow the vertical stacking and interconnection of multiple devices. 3-D packaging is an emerging technology that can be an alternative solution to scaling issues in complementary metal oxide semiconductors. SODs with different electrical, chemical, and mechanical properties were tested. The filling was conducted using spin coating, which is a readily available technology. In order to improve the filling performances, a prewetting solvent was applied prior to coating. Contact angle measurements were carried out to assess the polymer wetting properties. Without prewetting, it was observed that too high an affinity for the wafer surface was probably detrimental. With prewetting, the wetting was improved but this did not significantly modify the filling itself. The filling was rather improved due to the mechanical action of the solvent. Overall, most of the SOD could successfully fill the trenches, however, stress-related delamination could almost always be detected at the polymer/silicon interface. A stress study was carried out by finite element modeling in order to address the delamination issue. It was concluded that the level of stress is mainly governed by the cure temperature and other mechanical properties. This paper concludes with some recommendations on the choice of an SOD for filling applications.