Polycrystalline silicon thin-film transistor with self-aligned SiGe raised source/drain

Abstract

We have fabricated a polycrystalline silicon thin-film transistor with self-aligned SiGe raised source/drain (SiGe-RSD TFT). The SiGe-RSD regions were grown selectively by ultrahigh vacuum chemical vapor deposition at 550 °C. It was observed that, with SiH4 and GeH4 gas flow rates of 5 and 2 sccm, respectively, the poly-SiGe could be selectively grown up to 100 nm for source/drain regions. The resultant transistor structure features an ultrathin active channel region (20 nm) and a self-aligned thick source/drain region (120 nm), which is ideally suited for optimum performance. The significant improvements in electrical characteristics, such as higher turn-on current, lower leakage current, and higher drain breakdown voltage have been observed in the SiGe-RSD TFT, compared to the conventional TFT counterpart. These results indicate that TFTs with SiGe raised source/drain structure would be highly promising for ultrathin TFTs applications.