Polycrystalline silicon field emitter arrays by silicidation-sharpening technique at low temperature

Abstract

Gated polysilicon field emitter tip arrays have been fabricated by a method consisting of dry etching and silicidation-sharpening techniques instead of high-temperature thermal oxidation. The silicidation process of titanium was adopted for the tip sharpening process. After dry etching of amorphous silicon, a titanium layer was deposited and silicide was formed by a low-temperature (450–550 °C) annealing process. After the formation of titanium silicide, the silicide layer was removed by a buffered HF solution and sharply formed amorphous silicon tips were converted to polysilicon tips by low-temperature (600 °C) annealing. The gate aperture was formed by a spin-on-glass etch-back process. The obtained polysilicon tips were very sharp, comparable with those by the conventional oxidation process. All processes were done below 600 °C, so that the technology could be applied to a glass-based polysilicon field-emission display.