Abstract

The effect of rapid thermal annealing on the formation of polycrystalline silicon/interfacial oxide/single crystal silicon emitters is examined. The emitter width, defined as the distance from the oxide to the emitter junction, and the base width, defined as the distance from the emitter to the base junction, are measured by secondary ion mass spectrometry and spreading resistance depth profiling, thus differentiating between metallurgical and electrical junctions. Under isochronal annealing conditions of 10s, the metallurgically‐electrically equivalent emitter width increases monotonically from 0.04 μm at 900°C to 0.11 μm at 1050°C. By contrast, the nominal 0.38 μm metallurgical and 0.14 μm electrical base widths are essentially invariant to temperature. Under isothermal annealing conditions of 1050° and 900°C, there is almost no dependence on time of the emitter and base widths from 1 to 10, and 10 to 30s, respectively. Arsenic diffuses out of the polycrystalline silicon under all annealing conditions, especially as the annealing temperature is raised, causing an increase in sheet resistance of the emitter that is partly proportional to the arsenic loss. High resolution transmission electron microscopy shows that the interfacial oxide layer is stable to at least 900°C with both the number and size of epitaxial protuberances increasing with temperature, but not with annealing time. At 1050°C the interfacial oxide layer agglomerates, and as a consequence, epitaxial realignment of the polycrystalline silicon grains with the single crystal substrate occurs. By comparison, 30 min furnace annealing at 950°C results in emitter and base widths of 0.10 and 0.30 μm, respectively. There is almost no loss of arsenic, and the emitter sheet resistance is almost three times lower, and the base pinch resistance is approximately four times higher than that obtained by any rapid thermal annealing cycle. The interfacial oxide, although bumpy, remains intact, thus preventing any epitaxial realignment from occurring.

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