Polarization-Dominated Internal Timing Mechanism in a Ferroelectric Second-Order Memristor

Abstract

Second-order memristors are considered as ideal synaptic emulators for their capability of exhibiting ${\mathrm{Ca}}^{2+}$-like dynamics. Recently, ferroelectric second-order memristors were developed, but whether their temporal conductance evolution is related to polarization dynamics remains unclear owing to the difficulty in directly measuring polarization in these devices. This issue is addressed here by using a ferroelectric diode (FD) that shows both second-order memristive behavior and well-shaped polarization-voltage hysteresis loops. It is demonstrated that the resistance-state change in the FD is triggered by polarization switching, arising from polarization-controlled Schottky emission. Moreover, concurrent conductance decay and polarization relaxation are observed, and their correlation is quantitatively evidenced, suggesting that conductance decay is caused by the polarization-relaxation-induced increase in the Schottky barrier height. Using polarization relaxation as an internal timing mechanism, our FD-based second-order memristor faithfully emulates various synaptic functions, where short-term plasticity is indispensable, including excitatory postsynaptic current, paired-pulse facilitation, the transition from short-term plasticity to long-term plasticity, learning experience, and associative learning. Our study not only reveals a polarization-dominated internal timing mechanism in the FD-based second-order memristor, but also demonstrates that such a device is a promising building block for biorealistic neuromorphic systems.