Point defect reduction and carrier lifetime improvement of Si- and C-face 4H-SiC epilayers

Abstract

The impact of two post-growth processes, namely, C+-implantation/annealing process and thermal oxidation/annealing process, on trap concentrations in thick n-type 4H-SiC epilayers was studied for both Si- and C-face. Conditions such as the implantation dose and annealing temperature of the C+-implantation/annealing processes were optimized for Si-face epilayers, and consequently the Z1/2 center was eliminated up to 100 μm or more, and the minority carrier lifetime reached 13 μs while maintaining a good surface morphology. The effect of the process conditions on the creation of new traps, including ON1 center, was also studied in both Si- and C-face epilayers. The ON1 center was introduced in both Si- and C-face by two post-growth processes, although the concentration was found to vary according to the polar face and the post-growth processes. The mechanism of the different impacts on Z1/2 center reduction and ON1 center creation by the two post-growth processes on Si- and C-face is discussed.