Abstract
A novel isolation scheme named planarized trench isolation and field oxide formation using poly-silicon (PLATOP) Is described. PLATOP is applicable to high-performance submicron VLSI since it results in encroachment-free shallow trenches, and planarized field oxide. The process offers poly silicon-filled deep trenches. The process also relies on noncritical lithography and novel etch processes to planarize the deposited poly-silicon from the top of the active areas, and oxidation to consume the poly-silicon in the field regions. Electrical results are presented proving the viability of the isolation scheme.
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