Abstract
This paper demonstrates a method to update design revisions in the Platform Flash XCFP PROMs for configuration of Xilinx® FPGAs. The Platform Flash XCFP PROMs contain boundary-scan(JTAG) facilities that are compatible with IEEE Std 1149.1. Combining the FPGA configuration data (FPGA bitstream) into a PROM from GPIO ports of an embedded microcontroller through JTAG TAP interface of the PROM. The JTAG download method based on the GPIO ports of an embedded microcontroller can be implemented to erase, program, and verify the Platform Flash XCFP PROMs using IEEE Std 1149.1[1]
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